Gating circuits



Oct. 14, 1958 L. c. MERRILL GATING cmcurrs Filed April 9, 1956 -3OOV OUT OUT

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Leslie 0. Merrill ATTORNEY VOLTAGE AT 8 Patented Oct 14, 1958 Fice United States Patent GATING CIRCUITS Leslie C. Merrill, Fort Wayne, Ind., assignor to the United States of America as represented by the United States Atomic Energy Commission Application April 9, 1956, Serial No. 577,179

2 Claims. (Cl. 250-27) The present invention relates to gating circuits, and more especially to novel gating circuits including at least one current control device, a capacitance, and one or more unilateral conducting devices.

A gating circuit, as the term is used in the computer field, refers to a switching circuit whereby the passage of an information signal is controlled by the presence or absence of one or more control signals which serve to open or close the electronic gate." Gates are used for data switching, as in the transfer from a first register along a transfer bus to a second register; in data conversion, as in changing from binary to some other coded representation of numbers; and in signal preservation, where they are used for pulse shaping.

Gating has heretofore been done in a variety of ways. For example, a tetrode or special electrode tube may be used by applying the information and control signals to separate grids of the tube. A pair of electron tubes may be, interconnected with common plate and cathode loads and the control and information input signals applied to the respective grids, the output being taken either from the plate or cathode circuit. Diode gating is perhaps most common in computer design, andmay involve one or more diodes connected in circuit with a resistance and a source of potential, with an output being taken from the resistance-diode junction. Application of a gate pulse of one polarity to the diode will cause it to conduct through the resistor, changing the potential at the output junction of diode and resistor, while application of a pulse of the oppositepolarity to the diode will not affect the potential at the output junction. Gating of an electron tube is almost universally done on a control grid element, usually through some form of resistance-capacitance network. Pulse shaping networks are generally required in this operation because the waveform of the input voltage to the control grid is very critical in its effect upon conduction through the controlled tube.

With a knowledge of the disadvantage of and problems associated with gating circuits of the prior art, applicant has as an object of his invention provision of novel gating circuits Which Will operate reliably without special pulse shaping of the input gating signal, such that costly pulse shaping networks may be eliminated or their requirements substantially relaxed. A further object of the invention is to provide novel gating circuits wherein the cathode of an electron discharge device is operated upon, rather than the control grid, thus leaving both the grid and plate elements of the device free to receive signals for other purposes. Additional gating, control or output signals may be derivedfrom those elements without undue complication of the primary gating circuits and without requiring precise control of voltage and current level at each of the tube elements. An additional object of the invention is to provide relatively inexpensive gating circuits for use in electronic computing machines, where the great number of such gating circuits makes the cost of each circuit an important factor in machine 2. design. Yet another object of the invention is to provide more efiicient use of current through a, current control device such as an electron tube, including means whereby a relatively small pulse can switch a relatively large amount of power in'accordance with a control signal.

These and other objects and advantages of the invention will become apparent from the following detailed description of certain preferred embodiments thereof, when read in connection with the appended drawings, wherein:

Figure 1 represents a simple embodiment of the novel. gating circuit;

Figure 2 represents one stage of a counter circuit embodying the invention;

Figure 3 illustrates the embodiment of the invention in a multiple or" gating arrangement;

Figure 4 illustrates a form of the novel gating circuit adapted for inhibiting action;

Figure 5 represents a pulser circuit embodying the invention;

Figure 6 illustrates another gating circuit utilizing the invention; and

Figure 7 shows sample waveforms at certain reference points in Figure 1.

Referring now to Figure 1, according to its simplest embodiment, the invention comprises a current control device such as an electron discharge device or tube 2, a source of energizing voltage B+ connected to the plate of the tube, through load resistor 4, a diode l con nected between the cathode of the tube and ground, and a capacitance 3 coupled to the cathode at junction 7. A bias voltage from battery 6 is applied to the grid of the tube such that the tube is normally not conducting. A gating voltage is applied from the gate pulse generator 5 to one terminal of the capacitance 3. The pulse should be a roughly rectangular-shaped positive pulse as shown in Figure 7. The rectifier 1, preferably a crystal rectifier diode, is oriented so that conventional current flows in the direction of the arrow.

In operation, if a positive pulse is applied to condenser 3, it willcharge up the condenser to substantially the potential of the top of the pulse from the current flowingin the forward direction through the diode, but the cathode potential will not rise appreciably above ground due to the very low forward resistance of the diode. The condition of the tube will not be disturbed, since any rise in cathode potential tends to drive the tube further below cut-off. But at the end of the positive pulse, when the gating voltage applied to one plate of the condenser falls back to its original value, the potential at the other plate of the charged condenser falls correspondingly, as shown in Figure 7, driving the cathode below the potential at which tube 2 begins to conduct. The voltage at point 8 then falls from its normal level to a second level to produce the gate output signal.

The magnitude and duration of the gating pulse, the size of the capacitance, and the resistance of the diode determine the charge stored by condenser 3. The level of the grid bias is so related to that charge that condenser 3 drives the cathode voltage of tube 2 sufficiently close to the grid voltage level to allow the tube to conduct at the end of the pulse. In the usual case, as shown hereinafter, a feedback signal is then applied to the grid to drive it positive to make the tube conduct heavily and bring the cathode back up to ground potential by discharging capacitance 3. After the condenser has completely discharged, the cathode current all flows through the diode. The diodes are preferably of the germanium crystal rectifier type, which present a good low impedance path in the forward direction and. not too high a resistance in the backward direction. Since these diodes have a small amount of back leakage, a small current will flow in the back direction to charge the condenser to ground potential on the cathode side.

Figure 2 illustrates the invention as embodied in one stage of a multi-stage counting circuit. The circuit includes tubes 24. 25 energized through separate anode resistors 21, 22 by a source of B+ potential and having diodes 20, 29 connected in their cathode circuits. An input lead 26 is provided at the junction of condensers 28, 27 which are coupled to the respective cathodes of the tubes. Cross-coupling condensers 23, 23' connect the tube pla es to the opposite tube grid. In operation, suppose tube 24 is conducting while tube 25 is cut off. A positive pulse applied to lead 26 will charge up condenser 27 through diode 29. At the end the positive pulse, when lead- 26 returns one plate of condenser 27 to ground, the opposite condenser plate potential falls, driving the cathode of tube 25 well below ground, causing tube 25 to conduct as its cathode voltage approaches sufiiciently close to its grid voltage. The resulting potential drop at the plate of tube 25 is capacitively coupled back to the grid of tube 24 through condenser 23 to cut off tube 24. The resulting potential rise is coupled through condenser 23 to the grid of tube 25 to maintain conduction therethrough. Hence one pulse received on lead 26 has flipped the counter to its opposite state. The next pulse on lead 26 will cause tube 24 to conduct and cut off tube 25, returning the counter to its first state in the manner described above.

I may be seen that the above circuit provides a binary counter having a single input in the cathode circuits, while the control grids are left free except for non-critical feed-back signals, so they may receive other signal applications. An output may be taken through cathodefollower 19 and condenser 14 on lead 26, which may feed the next stage in a multi-stage counter, for example. An additional control input may be provided to tube 13, the cathode of which is coupled to the grid of tube 25 through resistors 12, 11, to control the state of the counter.

Referring now to Figure 3, a gating circuit for use with it different trigger sources is shown. By use of the present invention, applicant is able to trigger the common gate tube 31 without cross channel interference. The circuit may comprise input condensers 36, 37, diodes 32-35, and

electron discharge device or tube 31. Other similar input diode-capacitance networks may be coupled to the tube cathode as shown and are identical with the two illustrated. In operation, tube 31 is initially cut off by maintaining the control grid voltage sufficiently negative with respect to the cathode voltage by a battery or voltage from elsewhere in the associated circuitry. When a positive plus is applied to condenser 36 or 37, from gate pulse generator 38 or 39 the condensers charge through the diodes 33, 35. Then at the end of the pulse, the voltage at the junction between the diode and condenser will be driven downward by the amount of the charge on the condenser, driving the voltage of the tube cathode down below the point at which tube 31 begins to conduct. The tube then conducts through the appropriate diodes 32, 33 or 34, 35, producing a sudden drop in the output po tential due to the voltage drop across resistance 30. A positive feedback signal may be applied to the grid of tube 31 to maintain it conducting, if desired, as from a following amplifier stage.

Referring now to Figure 4, means may be provided to inhibit gating action; that is to prevent switching action even in the presence of a gating signal, when so desired in computer logical operations. The circuit may comprise an electron tube 43 energized through a source of 13-]- potential and a plate resistor 46 and provided with condenser 40 coupled between the tube cathode and a source 44 of gating voltage pulses. The tube cathode is connected through diode 41 to ground and is also connected through diode 42 to a source 45 of inhibiting current. In operation, tube 23 is maintained in its cut ofi condition, but a current flows in the cathode circuit from the source 45 of inhibit current through diodes 42, 41 to 4 ground. To inhibit gating, the magnitude of this current must be greater than CdE/dt, where E is the magnitude of the gating pulse and C is the capacity of condenser 40. When such conditions exist, capacitance 40 will not accumulate sutficient charge to pull the cathode of tube 43 down sufiiciently to allow the tube to conduct at the end of the gate pulse. The current source may generally take the form of a voltage supplied at two alternative levels: a first level insuflicient to cause current flow through rectifier 42 to ground and a second, higher level at sufiicientiy high potential to cause flow of a relatively large current.

Referring'now'to Figure 5, a pulse generator circuit which may be used for generating a series of timing pulses to direct computer operation, for example, is illustrated. The circuit comprises tubes 55, 56, 57, with the output being taken from the cathode of tube 57. Each of the tubes is energized through its plate resistor from a source of 8+ potential. The input to the pulse generator is a source of positive gate pulses 58. Each pulse causes condenser 59 to charge through diode 50. The grid of tube 55 is caught at substantially --10 volts through diode 51. At the end of the positive gate pulse, the cathode of tube 55 is driven negative, allowing the tube to conduct, thus producing a negative pulse at condenser 52. That negative pulse is coupled to the grid of tube 56, which was normally conductive, cutting off tube 56 and producing a positive pulse at the grid of tube 57. Tube 57 then conducts, raising the output voltage at its cathode. The voltage level of the output may be controlled by the magnitude of cathode resistor 53, which controls the swing of the first tube responsive to the input pulse. After a selected time, determined by the time constant involving condenser 52, grid resistor 54, and the cut-off potential of tube 56, tube 56 again begins to conduct, driving the grids of tube 55 and tube 57 negative, and thereby restoring the circuit to its original condition. The output then drops back to its more negative voltage level. The output thus generated may be coupled directly to the input of a second identical stage, if desired.

Figure 6 illustrates a logical and gate embodying the invention. The circuit comprises tube 61 having at least cathode, grid, and plate electrodes and energized through a plate resistor 62 from the source of operating or B+ potential. A diode 65 is connected between the cathode and a source of reference potential such as ground. Input gating pulses may be applied through gate pulse generators 63, 68 and capacitances 64, 66 and an output may be derived from lead 70, connected to resistance 62. The grid of tube 61 is biased below cut off to keep tube 61 normally non-conductive. Normally an inhibiting current fiows through diodes 67, 65 from source 69 to ground greater in magnitude than CdE/dt, where C is the value of the capacitance 64 and E is the magnitude of the gating pulses. When a positive pulse of magnitude E is impressed upon one of the input condensers, the negative kick at the cathode of tube 61 at the end of the positive gating pulse Will not be sufiicient to cause it to conduct because of the discharging of the charged capacitance by the inhibiting current. But if two input positive pulses are received at the input condensers 64, 66 simultaneously, the inhibiting current is not sufficient to discharge both the condensers, and a negative kick Will result on the cathode, pulling it down below the potential at which tube 61 conducts. Thus the condition for a logical and gate is met, since a single input will not cause tube 61 to conduct, while a coincident input will cause conduction.

It will be apparent from the foregoing description that the novel gating circuit discovered by applicant may be utilized in several circuit configurations in accordance with the logical functions desired to be performed. The circuits disclosed are relatively simple and inexpensive, and require no elaborate pulse shaping networks for reliable operation. The only apparent limitation on the gate pulse waveform applied to the input capacitance is that the fall time of the pulse be faster than the rate given by dE/dt=I /C, where I, is that current at which the particular current control device or electron tube triggers, C is the value of the capacitance used, and E is the magnitude of the gate pulse applied. It is desired, therefore, that the above physical embodiments be construed as illustrative only, rather than in a limiting sense, and that the scope of the invention be defined by the following claims.

What is claimed as novel is:

1. In combination, first and second electron discharge devices provided with cathode, grid and plate electrodes, a source of energizing potential provided with a point of reference coupled to said devices, respective rectifiers coupled between the cathodes of said devices and said reference point, first and second capacitances coupled to respective cathodes and provided with a common terminal, means coupled to said terminal for applying a positive pulse thereto, respective circuit means for coupling the plate of each of said devices to the grid of the opposite device, and means for deriving an output from one of said discharge devices.

2. In combination, a plurality of concatenated counter stages, each stage comprising first and second electron discharge devices connected in a bistable circuit, a third input electron discharge device, and a fourth output electron discharge devices, each of said discharge devices provided with at least cathode, grid and plate electrodes, means for energizing said discharge devices, a point of reference potential, first and second rectifiers coupled to the respective cathodes of said first and second discharge devices and to said point of reference, first and second capacita'nces coupled to respective cathodes of said first and second discharge devices and provided with a common input terminal to receive pulses for charging then discharging said capacitances, circuit means cross-connecting the plates of said first and second devices with the grids of the opposite discharge device, circuit means coupling respective cathodes of said third and fourth discharge devices to the grids of said first and second discharge devices respectively, means coupling the respective grids of said third and fourth discharge devices to the plates of said second and first discharge devices, respectively, and means for deriving an output signal from the cathode of said fourth discharge device responsive to signals at said terminal and the grid of said third input device.

References Cited in the file of this patent UNITED STATES PATENTS 2,431,766 Miller Dec. 21, 1947 

